In a system including a semiconductor memory, devices or memory modules of the semiconductor memory are arranged on a printed circuit board, and commands and data are exchanged by transmitting electrical signals. In a transmission path in which the electrical signals are transmitted, the impedance changes at, for example, connection points of a data bus and the memory devices. As a consequence, signal reflection generates electrical noise, and this deteriorates the signal quality.
Recently, the internal operating frequencies of processors and LSIs have rapidly increased, and the data transfer rate between memory devices have been increased accordingly. However, the afore-mentioned signal quality deterioration caused by the electrical noise is a large factor that interferes with high-speed data transfer between a memory device and IC chip. To cope with this electrical noise, the influence of signal reflection is reduced by attaching a terminating resistor to the end of a transmission path on a printed circuit board in, for example, a DDR-SDRAM.
When a plurality of memory devices are mounted in the same transmission path, however, an electrical signal to a memory device to be accessed suffers from the influence of signal reflection from memory devices that are not to be accessed. Accordingly, the aforesaid terminating resistor at the end of the transition path cannot singly reduce the influence of signal reflection, and this makes high-speed data transfer difficult. Therefore, more accurate reflected signal processing is necessary to achieve faster data transfer.
To perform this more accurate reflected signal processing, on-die termination (to be referred to as ODT hereinafter) is implemented in, for example, a DDR2-SDRAM. In this DDR2-SDRAM, a memory device contains a terminating resistor, and the terminating resistor of each memory device can be turned on and off by an ODT control signal.
FIG. 7 depicts a view describing the arrangement of ODT in the DDR2-SDRAM.
In a memory device 703, a terminating resistor Rt 701 for a data signal and data strobe signal is mounted on a die. The terminating resistor Rt 701 is turned on and off by turning on and off a switch 702 by an external ODT control signal 302.
FIG. 4 depicts a view describing the relationship between data in a data bus and the ODT control signal.
When the ODT control signal (ODT) 302 is turned on (to High level), the switch 702 is turned on at a timing 402 after the elapse of tAOND from a timing 401 at which ON of the ODT control signal 302 is detected on the leading (rising) edge of memory clock CLK. Consequently, the terminating resistor Rt 701 is connected, and termination by the resistor is made effective (turned on) (403).
Then, the switch 702 is turned off at a timing 405 after the elapse of tAOFD from a timing 404 of the rising edge of CLK at which OFF of the ODT control signal is detected. As a consequence, the terminating resistor Rt 701 is opened, and the termination is set OFF. In the presently commercially available DDR2-SDRAM, the time tAOND is normally equal to two cycles of a memory clock, and tAOFD is normally equal to 2.5 cycles of the memory clock.
When the DDR2-SDRAM as described above is used, the influence of signal reflection can be reduced even if a plurality of memory devices is mounted in the same transmission path. That is, the influence of signal reflection on a memory device to be accessed can be suppressed by turning on (connecting) the terminating resistor of a memory device that is not to be accessed. This makes faster data transfer possible.
Patent reference 1 discusses techniques pertaining to ODT of a memory device and the improvement of signal integrity obtained by ODT.    Patent reference 1: Japanese Patent Laid-Open No. 2003-345735